rockus.at: Ariadne 2

Ariadne 2 I/O connectors

For a long time now I wanted to know what the additional I/O connectors on VillageTronic's Ariadne 2 can be used for and how to access them. Unfortunately several tries to get hold of documentation only yielded in a "Not done yet." So, "several nights ago" I got bored [well, as bored as an engineer can get with a load of hardware in front of him :)], so I traced some lines, read some datasheets, did some coding and got high on the smell of burnt skin and vapourised tin. The result: some interesting tid-bits and a blinking LED.

For a start here's the list of signals on the I/O connectors:

I/O CON1 I/O CON2 I/O CON3

1
2
3
4
5
6
7
8
9
10 GND
GND
D8
D9
D10
D11
D12
D13
D14
D15 1
2
3
4
5
6
7
8
9
10 GND
GND
D0
D1
D2
D3
D4
D5
D6
D7 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 +12VDC
-12VDC
+5VDC
+5VDC
+5VDC
+5VDC
GND
GND
/INT2
/INT6
A1
A2
A3
A4
A5
A6
A7 18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34 A8
A9
A10
A11
A12
A13
A14
GND
GND
/IOR
/IOW
/SMEMRB
/SMEMWB
IOCHRDY
RSTDRV
N/C
N/C

Some remarks:

- /IOR and /IOW are the read and write command lines from the host, i.e. the Amiga.

- /SMEMRB and /SMEMWB are read/write command lines (/OE and /WE respectively) for the optional flash boot ROM.

- RSTDRV sends a reset command from the host, high active.

- IOCHRDY is asserted by the rtl8019 if it needs wait states introduced, low active. Pay attention to the version of the chip and the version of the datasheet you use when comparing results: RTL8019AS has a changed pinout in regards to Pins 31-35 when compared to the older version RTL8019. That's what threw me off in my first try ;)

- Warning: Although the power supply pins have been tested for their voltages and the information presented here is believed to be correct, there is no guarantee given as to the correctness of that information. You have been warned, see disclaimer as well. It should also be mentioned that there is no -5VDC available on I/O CON3 in spite of this voltage being available at the Zorro bus (pin 8) and 2 pins of I/O CON3 apparently still free. However, pin 8 on the Zorro bus is definitely not connected.

As can be seen, there is no chip select line implemented for these connectors. The proper addresses would have to be decoded on an add-on itself. /IOR, /IOW, /SMEMRB and /SMEMWB are only asserted if addresses are accessed within the 64KB I/O space the Ariadne 2 is configured in.

Tests have shown that the rtl8019 registers are present in the lower 32KB of the I/O space several times. They show up at 0x0600, 0x0e00, 0x1600, 0x1e00, ..., 0x7600 and 0x7e00. All but the first seem to be mere mirrors of the first occurance. In fact, the Linux/m68k driver (line 73) for the Ariadne 2 accesses the rtl8019 from 0x0600 onwards.

There is a LhA-Archive of source and binary for a short quick&dirty test program available, relevant snippets from the code are explained below.

The definitions necessary to find the proper device structures using FindConfigDev():

#define VillageTronic  2167      // manufacturer
#define AriadneII       202      // product

A part of a structure (filled with paddings) to access page0 of rtl8019's registers. Of special interest are rtl8019ID0 and rtl8019ID1 as these are supposed to always read 0x70 and 0x50 respectively, which comes in very handy in trying to figure out register layout and addressing schemes:

struct rtl8019
{
        UBYTE rtlCR;
        UBYTE pad0;     // rtl8019 connected to even addresses
        UBYTE rtlCLDA0;
        UBYTE pad1;
        UBYTE rtlCLDA1;
        UBYTE pad2;
        UWORD pad[7];
        UBYTE rtl8019ID0;
        UBYTE pad10;
        UBYTE rtl8019ID1;
        UBYTE pad11;
};

To retrieve the addresses to access the registers the following equations will help as usual, where confDev contains the pointer to the I/O space as returned by FindConfigDev():

#define RTL8019offset 0x600
AriadneIIBase = (ULONG)(confDev->cd_BoardAddr);
rtl8019 = (struct rtl8019 *)((ULONG)(AriadneIIBase) | RTL8019offset);

The above is to access the rtl8019 chip present on the Ariadne 2. But more interesting should be information on how to use the I/O connectors. Judging by the results retrieved from the small test program above, there is supposed to be 32KB (at offsets 0x8000...0xffff) of address space easily addressable and usable for hardware connected to the I/O pins of this nice card.

There are 14 address lines (A1...A14) available on I/O CON3, which resolves to 32KB addressable space (16bit wide). /IOR and /IOW adress the lower 32KB of the 64KB Zorro-II I/O space, while the upper half of the I/O space is addressed using /SMEMRB and /SMEMWB.

This then resolves in the following memory map:

offset	contents	accessed by
0x0000-0x7fff	rtl8019 register	/IOR , /IOW
0x8000-0xffff	I/O / Flash space	/SMEMRB , /SMEMWB

I would believe this information to be as correct as is needed, to add any hardware to the Ariadne 2.

Note: After a reboot the Amiga appears to try to write some location in the upper memory area. I guess this is to determine if there is a Flash or SRAM available there. With this in mind it is perfectly possible now to attach some cute little devices to these ports.

If anyone out there wants to add to this page or has some comments, feel free to drop me an email.